CD4027 DIP16 Integrated

CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits built with N and P channel enhancement mode transistors. Each flip-flop has independent J, K, set, reset and clock inputs and buffer Q and Q outputs. These flip flops are edge sensitive to clock input and change the state of the positive going transition of clock pulses. Setting or resetting is independent of the clock and is performed with a high level on the corresponding input.

All inputs are protected against damage due to static discharge by diode clamps to VDD and VSS.